There are numerous different principles and basic architectures to perform analog-to-digital conversion. For example, there are successive approximation converters (SAR), flash converters, pipeline converters and sigma-delta converters (SD-converters). Almost all kinds of converters compare the analog input signal to one or more reference values. SD-converters use a rather raw comparison in combination with noise shaping and oversampling. SD-converters are generally robust against production spread and component mismatch and are typically used to achieve very high resolutions. SD-converters include an SD-modulator stage, which operates at a very high clock rate (oversampling rate), much higher than the signal bandwidth of the input signal. Digital post processing by digital filters produces the desired multi-bit digital output word at a lower clock rate. The digital filters used for post-processing of an SD-modulator output signal have a specific transfer function (e.g. low pass characteristic) to remove unwanted spectral parts from the digital output signal, which would otherwise fold into the signal band, while down-sampling the digital signal. Once the (e.g. high frequency) noise is suppressed in the digital output signal, the sampling rate can be reduced and the bit width of the digital output words is increased. As chip area is an important economic factor regarding production of integrated circuits, reuse of a single analog-to-digital converter in multi-channel applications is often considered. This could be implemented by multiplexing a single analog-to-digital converter between multiple channels.
Multiplexing multiple different input signals to a single analog-to-digital converter is possible only if the time a converter needs to settle to a new input signal and to produce a corresponding digital output value is acceptable. Compared with other architectures, like SAR, pipeline, or flash converters, the digital output filters for post processing of the digital output signals of the modulator in SD-converters often need too much time to settle. This is due to the usually large time constants of those filters, which are necessary to provide sufficient noise suppression. Therefore switching the input of an SD-converter between two analog input signals takes a lot of time for the settling process before the output signal is valid again due mainly to the large time constants of the digital filters. This could be avoided by further increasing the sampling frequency of the SD-modulator and the digital filter, but this highly uneconomical in terms of power consumption. Therefore, conventional multi-channel applications using SD-converters provide one complete sigma-delta modulator and a corresponding digital filter for each channel.